Monocrystalline three-dimensional integrated-circuit technology

• Main Authors: Warner, Jr., Raymond M, MacCrisken, John E
• Format: Patent
• Language: English
• Published: 05.02.2002

1. Field of the Invention Three technologies realize monocrystalline three-dimensional (3-D) integrated circuits: (1) silicon sputter epitaxy permitting fast growth at low temperature; (2) real-time pattern generation using a pixel-by-pixel programmable device to create a patterned beam of energetic radiation; and (3) flash diffusion focuses through a projector barrel the patterned beam on a silicon sample, causing localized dopant diffusion from a heavily doped region at the surface into the underlying region. Removing the heavily doped layer leaves a 2-D doping pattern. Creating additional 2-D patterns on top of it through process repetition produces a buried 3-D doping pattern. One configuration places projector barrel and sample in fixed positions inside the sputtering chamber and a ring of targets around the barrel facing the sample with targets of a given kind symmetrically positioned in the ring. Cobalt can be substituted for the doping layer and can be driven in creating silicide conductive patterns.