Designing Neuromorphic Processor with On-Chip Learning

• Published in: IDEC Journal of Integrated Circuits and Systems, 6(2) pp. 17 - 22
• Main Authors: 박정우, 전동석
• Format: Journal Article
• Language: English
• Published: 반도체설계교육센터 01.04.2020
• Subjects: 전기공학
• ISSN: 2384-2113
• DOI: 10.23075/jicas.2020.6.2.004

In this paper, we present a neuromorphic processor that could learn to classify images through spiking information between neurons. Data is only computed locally, and there is no need for energy-hungry data transmissions that is required for any other machine learning algorithms. Careful algorithmic adaptations, along with novel hardware implementation of softmax functions are introduced to deliver maximum performance on image classification tasks while minimizing energy consumption. The design was fabricated in TSMC 65nm technology and consumes mere 23.6mW at a scaled voltage of 0.8V with 20MHz clock frequency, while showing a throughput of 73.9M pixels/second for supervised training on handwritten images KCI Citation Count: 4