Surface Modifi cations for Light Trapping in Silicon Heterojunction Solar Cells: A Brief Review

• Published in: Transactions on electrical and electronic materials pp. 349 - 354
• Main Authors: 박형식, 주민규(성균관대학교, Muhammad Quddamah Khokhar, 조은철, 김영국, 조영현, 이준신
• Format: Journal Article
• Language: English
• Published: 한국전기전자재료학회 01.08.2020
• Subjects: 전기공학
• ISSN: 1229-7607; 2092-7592
• DOI: 10.1007/s42341-020-00203-1

Reducing crystalline silicon (c-Si) wafer thickness is an eff ective method to reduce the fabrication cost as it constitutes a major portion of the photovoltaic module cost. However, the open-circuit voltage and fi ll factor depend on the wafer thickness; further, the short-circuit current density (J SC ), aff ects the device performance negatively. Therefore, light trapping is vital for increasing the J SC of Si solar cells. Consequently, it is essential for improving the conversion effi ciency of the solar cell and reduce its production cost by decreasing the wafer thickness. It can be assumed that the thickness of the Si wafer will gradually achieve a minimum value of ~ 100 μm in the future. Therefore, reducing the as-cut wafer thickness will result in a more effi cient use of Si. This paper reports the surface modifi cation for light trapping based on the Si solar cell application. Additionally, we introduce methods for surface modifi cation, such as front-side texturing and rear-side polishing. KCI Citation Count: 0