Design of a Prototype 64-Channel ROIC for SWIR Imaging Sensor Applications
This paper presents the design and validation of a 64-channel prototype Readout Integrated Circuit (ROIC) for InGaAs-based compound semiconductor pixels, specifically aimed at Short-Wave Infrared (SWIR) imaging systems. The ROIC, fabricated using a 0.18μm CMOS process, Consists of a 64-channel array...
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| Published in | IDEC Journal of Integrated Circuits and Systems, 10(4) pp. 17 - 24 |
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| Main Authors | , , , |
| Format | Journal Article |
| Language | English |
| Published |
반도체설계교육센터
01.10.2024
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| Subjects | |
| Online Access | Get full text |
| ISSN | 2384-2113 |
| DOI | 10.23075/jicas.2024.10.4.004 |
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| Summary: | This paper presents the design and validation of a 64-channel prototype Readout Integrated Circuit (ROIC) for InGaAs-based compound semiconductor pixels, specifically aimed at Short-Wave Infrared (SWIR) imaging systems. The ROIC, fabricated using a 0.18μm CMOS process, Consists of a 64-channel array with a pitch of 50μm and a total chip area of 5 × 2.5 mm². Comprehensive silicon-level validation has been performed to ensure stability and performance reliability. The ROIC achieves a random noise level of 119.48 μVrms and operates with a total power consumption of 22.55 mW, demonstrating its suitability for infrared imaging applications. The study highlights the innovative approach of incorporating variable conversion gain and sensitivity adjustment to accommodate different pixel signal characteristics, thereby enhancing the overall imaging performance. KCI Citation Count: 0 |
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| ISSN: | 2384-2113 |
| DOI: | 10.23075/jicas.2024.10.4.004 |