HETEROGENEOUS MULTIPROCESSOR DESIGN FOR POWER-EFFICIENT AND AREA-EFFICIENT COMPUTING

A technique for managing processor cores within a multi-core central processing unit (CPU) provides efficient power and resource utilization over a wide workload range. The CPU comprises at least one core designed for low power operation and at least one core designed for high performance operation....

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Bibliographic Details
Main Authors PATEL RAHUL GAUTAM, HICOK GARY D, LONGNECKER MATTHEW RAYMOND
Format Patent
LanguageEnglish
Published 26.06.2014
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Summary:A technique for managing processor cores within a multi-core central processing unit (CPU) provides efficient power and resource utilization over a wide workload range. The CPU comprises at least one core designed for low power operation and at least one core designed for high performance operation. For low workloads, the low power core executes the workload. For certain higher workloads, the high performance core executes the workload. For certain other workloads, the low power core and the high performance core both share execution of the workload. This technique advantageously enables efficient processing over a wider range of workloads than conventional systems.
Bibliography:Application Number: US201213723995