Method and apparatus for decimal number multiplication using hardware for binary number operations
According to embodiments of the subject matter disclosed in this application, decimal floating-point multiplications and/or decimal fixed-point multiplications may be implemented using existing hardware for binary number operations. The implementation can be carried out in software, in hardware, or...
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          | Main Author | |
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| Format | Patent | 
| Language | English French German  | 
| Published | 
          
        10.12.2008
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| Subjects | |
| Online Access | Get full text | 
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| Summary: | According to embodiments of the subject matter disclosed in this application, decimal floating-point multiplications and/or decimal fixed-point multiplications may be implemented using existing hardware for binary number operations. The implementation can be carried out in software, in hardware, or in a combination of software and hardware. Pre-calculated constants that are approximations to negative powers of 10 and stored in binary format may be used for rounding multiplication results to a designated precision by multiplying the results with a pre-calculated constant. Additionally, several parts of a decimal multiplication may be carried out in parallel. Furthermore, a simple comparison with a constant instead of an expensive remainder calculation may be used for midpoint detection and exactness determination. | 
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| Bibliography: | Application Number: EP20070251933 |