集成电路器件和制作技术

• Format: Patent
• Language: Chinese
• Published: 07.01.2022
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

集成电路器件和制作技术。一种半导体器件制作方法可以包括在相同处理步骤中掺杂集成电路的衬底的第一和第二部分。第一部分对应于半导体器件的掺杂的区域。第二部分对应于过孔接触。该方法还可以包括在掺杂之后形成半导体器件的栅极。 Single gate and dual gate FinFET devices suitable for use in an SRAM memory array have respective fins, source regions, and drain regions that are formed from portions of a single, contiguous layer on the semiconductor substrate, so that STI is unnecessary. Pairs of FinFETs can be configured as dependent-gate devices wherein adjacent channels are controlled by a common gate, or as independent-gate devices wherein one channel is controlled by two gates. Metal interconnects coupling a plurality of the FinFET devices are made of a same material as the gate electrodes. Such structural and material commonalities help to reduce costs of manufacturing high-density memory arrays.