Hybrid decision diagrams

• Published in: Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design pp. 159 - 163
• Main Authors: Clarke, E. M., Fujita, M., Zhao, X.
• Format: Conference Proceeding
• Language: English
• Published: Washington, DC, USA IEEE Computer Society 01.12.1995
• Series: ACM Conferences
• Subjects: Hardware > Hardware validation; linear expressions; BMDs; time complexity; circuit analysis computing; integers; boolean vectors; hybrid decision diagrams; binary decision diagrams; digital arithmetic; arithmetic circuits verification; multi-terminal binary decision diagrams; MTBDDs; symbolic model checking algorithms; computational complexity
• ISBN: 0818672137; 9780818672132
• DOI: 10.5555/224841.224875

Functions that map boolean vectors into the integers are important for the design and verification of arithmetic circuits. MTBDDs and BMDs have been proposed for representing this class of functions. We discuss the relationship between these methods and describe a generalization called hybrid decision diagrams which is often much more concise. We show how to implement arithmetic operations efficiently for hybrid decision diagrams. In practice, this is one of the main limitations of BMDs since performing arithmetic operations on functions expressed in this notation can be very expensive. In order to extend symbolic model checking algorithms to handle arithmetic properties, it is essential to be able to compute the BDD for the set of variable assignments that satisfy an arithmetic relation. In our paper, we give an efficient algorithm for this purpose. Moreover, we prove that for the class of linear expressions, the time complexity of our algorithm is linear in the number of variables.