APA (7th ed.) Citation

Das, S. R., Jin, C., Jin, L., Assaf, M. H., Petriu, E. M., & Sahinoglu, M. (2004, January). Altera Max Plus II Development Environment in Fault Simulation and Test Implementation of Embedded: Cores-Based Sequential Circuits. Distributed Computing - IWDC 2004, 353-360. https://doi.org/10.1007/978-3-540-30536-1_39

Chicago Style (17th ed.) Citation

Das, Sunil R., Chuan Jin, Liwu Jin, Mansour H. Assaf, Emil M. Petriu, and Mehmet Sahinoglu. "Altera Max Plus II Development Environment in Fault Simulation and Test Implementation of Embedded: Cores-Based Sequential Circuits." Distributed Computing - IWDC 2004 Jan. 2004: 353-360. https://doi.org/10.1007/978-3-540-30536-1_39.

MLA (9th ed.) Citation

Das, Sunil R., et al. "Altera Max Plus II Development Environment in Fault Simulation and Test Implementation of Embedded: Cores-Based Sequential Circuits." Distributed Computing - IWDC 2004, Jan. 2004, pp. 353-360, https://doi.org/10.1007/978-3-540-30536-1_39.