1.9-GHz CMOS Power Amplifier using Adaptive Biasing Technique at AC Ground
A 1.9-GHz linear CMOS power amplifier is presented. An adaptive bias circuit (ABC) that utilizes an AC ground to detect the power level of the input signal is proposed to enhance the linearity and efficiency of the power amplifier. The ABC utilizes the second harmonic component as the input to mitig...
Saved in:
Published in | Journal of Information and Communication Convergence Engineering, 17(4) Vol. 17; no. 4; pp. 285 - 289 |
---|---|
Main Authors | , , |
Format | Journal Article |
Language | English |
Published |
한국정보통신학회JICCE
01.12.2019
한국정보통신학회 |
Subjects | |
Online Access | Get full text |
ISSN | 2234-8255 2234-8883 |
DOI | 10.6109/jicce.2019.17.4.285 |
Cover
Summary: | A 1.9-GHz linear CMOS power amplifier is presented. An adaptive bias circuit (ABC) that utilizes an AC ground to detect the power level of the input signal is proposed to enhance the linearity and efficiency of the power amplifier. The ABC utilizes the second harmonic component as the input to mitigate the distortion of the fundamental signal. The input power level of the ABC was detected at the AC ground located at the VDD node of the power amplifier. The output of the ABC was fed into the inputs of the power stage. The input signal distortion was mitigated by detecting the input power level at the AC ground. The power amplifier was designed using a 180 nm RFCMOS process to evaluate the feasibility of the application of the proposed ABC in the power amplifier. The measured output power and power-added efficiency were improved by 1.7 dB and 2.9%, respectively. KCI Citation Count: 0 |
---|---|
Bibliography: | http://www.jicce.org/ |
ISSN: | 2234-8255 2234-8883 |
DOI: | 10.6109/jicce.2019.17.4.285 |