Increasing PCM main memory lifetime
The introduction of Phase-Change Memory (PCM) as a main memory technology has great potential to achieve a large energy reduction. PCM has desirable energy and scalability properties, but its use for main memory also poses challenges such as limited write endurance with at most 10 7 writes per bit c...
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| Published in | 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010) pp. 914 - 919 |
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| Main Authors | , , , , , |
| Format | Conference Proceeding |
| Language | English |
| Published |
IEEE
01.03.2010
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| Subjects | |
| Online Access | Get full text |
| ISBN | 1424470544 9781424470549 |
| ISSN | 1530-1591 |
| DOI | 10.1109/DATE.2010.5456923 |
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| Summary: | The introduction of Phase-Change Memory (PCM) as a main memory technology has great potential to achieve a large energy reduction. PCM has desirable energy and scalability properties, but its use for main memory also poses challenges such as limited write endurance with at most 10 7 writes per bit cell before failure. This paper describes techniques to enhance the lifetime of PCM when used for main memory. Our techniques are (a) writeback minimization with new cache replacement policies, (b) avoidance of unnecessary writes, which write only the bit cells that are actually changed, and (c) endurance management with a novel PCM-aware swap algorithm for wear-leveling. A failure detection algorithm is also incorporated to improve the reliability of PCM. With these approaches, the lifetime of a PCM main memory is increased from just a few days to over 8 years. |
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| ISBN: | 1424470544 9781424470549 |
| ISSN: | 1530-1591 |
| DOI: | 10.1109/DATE.2010.5456923 |