Fine-grain task aggregation and coordination on GPUs

• Published in: 2014 ACM/IEEE 41st International Symposium on Computer Architecture (ISCA) pp. 181 - 192
• Main Authors: Orr, Marc S., Beckmann, Bradford M., Reinhardt, Steven K., Wood, David A.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.06.2014
• Subjects: Arrays; Flow graphs; Graphics processing units; Hardware; Kernel; Parallel processing
• ISBN: 1479943967; 9781479943968
• ISSN: 1063-6897
• DOI: 10.1109/ISCA.2014.6853209

In general-purpose graphics processing unit (GPGPU) computing, data is processed by concurrent threads executing the same function. This model, dubbed single-instruction/multiple-thread (SIMT), requires programmers to coordinate the synchronous execution of similar operations across thousands of data elements. To alleviate this programmer burden, Gaster and Howes outlined the channel abstraction, which facilitates dynamically aggregating asynchronously produced fine-grain work into coarser-grain tasks. However, no practical implementation has been proposed. To this end, we propose and evaluate the first channel implementation. To demonstrate the utility of channels, we present a case study that maps the fine-grain, recursive task spawning in the Cilk programming language to channels by representing it as a flow graph. To support data-parallel recursion in bounded memory, we propose a hardware mechanism that allows wavefronts to yield their execution resources. Through channels and wavefront yield, we implement four Cilk benchmarks. We show that Cilk can scale with the GPU architecture, achieving speedups of as much as 4.3x on eight compute units.