Point twin-bit RRAM in 3D interweaved cross-point array by Cu BEOL process

A self-rectifying twin-bit RRAM in a novel 3D interweaved cross-point array has been proposed and demonstrated in 28nm CMOS BEOL process. With TaO x RRAMs on both sides of a single Via, the twin-bit RRAM cell is composed by Cu back-end layers only. Excellent selectivity by its asymmetric IV characte...

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Bibliographic Details
Published inTechnical digest - International Electron Devices Meeting pp. 6.4.1 - 6.4.4
Main Authors Yung-Wen Chin, Shu-En Chen, Min-Che Hsieh, Tzong-Sheng Chang, Chrong Jung Lin, Ya-Chin King
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.12.2014
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ISSN0163-1918
DOI10.1109/IEDM.2014.7046996

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Summary:A self-rectifying twin-bit RRAM in a novel 3D interweaved cross-point array has been proposed and demonstrated in 28nm CMOS BEOL process. With TaO x RRAMs on both sides of a single Via, the twin-bit RRAM cell is composed by Cu back-end layers only. Excellent selectivity by its asymmetric IV characteristic enables the twin-bit 1R cells to be efficiently stacked in 3D cross-point arrays.
ISSN:0163-1918
DOI:10.1109/IEDM.2014.7046996