Clock-Frequency Assignment for Multiple Clock Domain Systems-on-a-Chip
Modern systems-on-a-chip platforms support multiple clock domains, in which different sub-circuits are driven by different clock signals. Although the frequency of each domain can be customized, the number of unique clock frequencies on a platform is typically limited. We define the clock-frequency...
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| Published in | 2007 Design, Automation & Test in Europe Conference & Exhibition pp. 1 - 6 |
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| Main Authors | , , , |
| Format | Conference Proceeding |
| Language | English |
| Published |
IEEE
01.04.2007
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| Subjects | |
| Online Access | Get full text |
| ISBN | 3981080122 9783981080124 |
| ISSN | 1530-1591 |
| DOI | 10.1109/DATE.2007.364624 |
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| Summary: | Modern systems-on-a-chip platforms support multiple clock domains, in which different sub-circuits are driven by different clock signals. Although the frequency of each domain can be customized, the number of unique clock frequencies on a platform is typically limited. We define the clock-frequency assignment problem to be the assignment of frequencies to processing modules, each with an ideal maximum frequency, such that the sum of module processing times is minimized, subject to a limit on the number of unique frequencies. We develop a novel polynomial-time optimal algorithm to solve the problem, based on dynamic programming. We apply the algorithm to the particular context of post-improvement of accelerator-based hardware/software partitioning, and demonstrate 1.5times-4times additional speedups using just three clock domains |
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| ISBN: | 3981080122 9783981080124 |
| ISSN: | 1530-1591 |
| DOI: | 10.1109/DATE.2007.364624 |