APA (7th ed.) Citation

Deepaksubramanyan, B., & Nunez, A. (2007, August). Analysis of subthreshold leakage reduction in CMOS digital circuits. 2007 50th Midwest Symposium on Circuits and Systems, 1400-1404. https://doi.org/10.1109/MWSCAS.2007.4488809

Chicago Style (17th ed.) Citation

Deepaksubramanyan, B.S, and A. Nunez. "Analysis of Subthreshold Leakage Reduction in CMOS Digital Circuits." 2007 50th Midwest Symposium on Circuits and Systems Aug. 2007: 1400-1404. https://doi.org/10.1109/MWSCAS.2007.4488809.

MLA (9th ed.) Citation

Deepaksubramanyan, B.S, and A. Nunez. "Analysis of Subthreshold Leakage Reduction in CMOS Digital Circuits." 2007 50th Midwest Symposium on Circuits and Systems, Aug. 2007, pp. 1400-1404, https://doi.org/10.1109/MWSCAS.2007.4488809.