Breakthrough Integration of 32nm-node CulCntra Low-k SiOC (k=2.0) Interconnects by using Advanced Pore-Sealing and Low-k Hard Mask Technologies

• Published in: Proceedings of the IEEE International Interconnect Technology Conference pp. 210 - 212
• Main Authors: Arakawa, S., Mizuno, I., Ohoka, Y., Nagahata, K., Tabuchi, K., Kanamura, R., Kadomura, S.
• Format: Conference Proceeding
• Language: English; Japanese
• Published: IEEE 2006
• Subjects: Capacitance; Etching; Moisture; Plasma properties; Polymer films; Prognostics and health management; Protection; Samarium; Stress; Thermal degradation
• ISBN: 1424401046; 9781424401048
• ISSN: 2380-632X
• DOI: 10.1109/IITC.2006.1648690

The breakthrough integration of Cu/ultra low-k (ULK) SiOC (k = 2.0) interconnects by using advanced pore-sealing and low-k hard mask (HM, k = 2.65) technologies has been accomplished. A low-k HM (k = 2.65) on a hybrid (PAr/SiOC) structure was successfully integrated by using a newly developed protection hard mask (PHM) process that provides a well-controlled dual-damascene (DD) profile. A significant reduction in innerline capacitance was achieved without degradation of TDDB performance and electrical properties. For via ILD, ULK SiOC (k = 2.0) was introduced and has achieved good electrical properties. In addition, an organic gas plasma treatment (OPT) was developed as a pore sealing process, which has resulted in significant improvement of stress migration (SM) and electromigration (EM) performances. Morever, this work revealed the mechanism of the reliability improvement. It was concluded that these advanced pore-sealing and low-k HM technologies are the most feasible integration scheme for 32nm-node Cu/ULK interconnects