Programmable design for memory sharing processor array
Memory sharing processor array (MSPA) architecture has been proposed with advantages of high efficiency parallel processing, less data storage requirement, and high-cost performance. MSPA design methodology has been developed with regular structure and systematic procedure. In this paper, programmab...
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| Published in | 1997 IEEE International Symposium on Circuits and Systems Vol. 3; pp. 2048 - 2051 vol.3 |
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| Main Authors | , |
| Format | Conference Proceeding |
| Language | English Japanese |
| Published |
IEEE
22.11.2002
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| Subjects | |
| Online Access | Get full text |
| ISBN | 9780780335837 078033583X |
| DOI | 10.1109/ISCAS.1997.621558 |
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| Abstract | Memory sharing processor array (MSPA) architecture has been proposed with advantages of high efficiency parallel processing, less data storage requirement, and high-cost performance. MSPA design methodology has been developed with regular structure and systematic procedure. In this paper, programmable MSPA is proposed. It embeds not only MSPA architecture, but design procedure into silicon chips so that various applications can be performed with high speed. |
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| AbstractList | Memory sharing processor array (MSPA) architecture has been proposed with advantages of high efficiency parallel processing, less data storage requirement, and high-cost performance. MSPA design methodology has been developed with regular structure and systematic procedure. In this paper, programmable MSPA is proposed. It embeds not only MSPA architecture, but design procedure into silicon chips so that various applications can be performed with high speed. |
| Author | Kunjeda, H. Li, D. |
| Author_xml | – sequence: 1 givenname: D. surname: Li fullname: Li, D. organization: Dept. of Electr. & Electron. Eng., Tokyo Inst. of Technol., Japan – sequence: 2 givenname: H. surname: Kunjeda fullname: Kunjeda, H. |
| BookMark | eNotj8tqwzAURAVtoW3qD2hX-gG7kqyrxzKYPgKBFpJ9uJauXZfYDtLKf19DOgycxcCBeWS30zwRY89SVFIK_7o7NNtDJb23lVESwN2wwlsn1tY1uNresyLnX7FGg_agHpj5TnOfcByxPROPlId-4t2c-EjjnBaefzANU88vaQ6U8zpgSrg8sbsOz5mKf27Y8f3t2HyW-6-PXbPdl4MDXUYXgwUA7ZwWypAJwVpURnaogtHRUWsBlY86QAtGGomy1UDBkY1G2HrDXq7agYhOlzSMmJbT9Vv9B8rzRi8 |
| ContentType | Conference Proceeding |
| DBID | 6IE 6IL CBEJK RIE RIL |
| DOI | 10.1109/ISCAS.1997.621558 |
| DatabaseName | IEEE Electronic Library (IEL) Conference Proceedings IEEE Xplore POP ALL IEEE Xplore All Conference Proceedings IEEE/IET Electronic Library (IEL) IEEE Proceedings Order Plans (POP All) 1998-Present |
| DatabaseTitleList | |
| Database_xml | – sequence: 1 dbid: RIE name: IEEE/IET Electronic Library (IEL) url: https://proxy.k.utb.cz/login?url=https://ieeexplore.ieee.org/ sourceTypes: Publisher |
| DeliveryMethod | fulltext_linktorsrc |
| EndPage | 2051 vol.3 |
| ExternalDocumentID | 621558 |
| GroupedDBID | 6IE 6IK 6IL AAJGR AAWTH ACGHX ALMA_UNASSIGNED_HOLDINGS BEFXN BFFAM BGNUA BKEBE BPEOZ CBEJK IERZE OCL RIE RIL |
| ID | FETCH-LOGICAL-i854-d8dc75554884026e6cc77a261fa2c64d8eb75a29d4c5b56161a1b45ec8e7d6073 |
| IEDL.DBID | RIE |
| ISBN | 9780780335837 078033583X |
| IngestDate | Wed Aug 27 02:45:22 EDT 2025 |
| IsPeerReviewed | false |
| IsScholarly | false |
| Language | English Japanese |
| LinkModel | DirectLink |
| MergedId | FETCHMERGED-LOGICAL-i854-d8dc75554884026e6cc77a261fa2c64d8eb75a29d4c5b56161a1b45ec8e7d6073 |
| ParticipantIDs | ieee_primary_621558 |
| PublicationCentury | 2000 |
| PublicationDate | 2002-11-22 |
| PublicationDateYYYYMMDD | 2002-11-22 |
| PublicationDate_xml | – month: 11 year: 2002 text: 2002-11-22 day: 22 |
| PublicationDecade | 2000 |
| PublicationTitle | 1997 IEEE International Symposium on Circuits and Systems |
| PublicationTitleAbbrev | ISCAS |
| PublicationYear | 2002 |
| Publisher | IEEE |
| Publisher_xml | – name: IEEE |
| SSID | ssj0000454952 |
| Score | 1.3120005 |
| Snippet | Memory sharing processor array (MSPA) architecture has been proposed with advantages of high efficiency parallel processing, less data storage requirement, and... |
| SourceID | ieee |
| SourceType | Publisher |
| StartPage | 2048 |
| SubjectTerms | Application specific integrated circuits Communication system control Costs Data engineering Digital-to-frequency converters Electronic mail Memory Parallel processing Resource management Signal generators |
| Title | Programmable design for memory sharing processor array |
| URI | https://ieeexplore.ieee.org/document/621558 |
| Volume | 3 |
| hasFullText | 1 |
| inHoldings | 1 |
| isFullTextHit | |
| isPrint | |
| link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwjV1JSwMxFA7akye3ijs5eJ3pJJNtjlIsVVAKrdBbyfIGRbrQ5VB_vVnaiuLBWyYDw4QQvvdevu97CN1xClw7JrKSgsqYR8xMmViJ82APxNVQBoHz84vovrKnIR9ufLajFgYAIvkM8jCMd_lualehVNYSHp-42kf7Uokk1dqVU4KTXMVTYq6KsuSq3PrrbJ_l5lKTFFXrsd--7welnszTR380V4nY0jlMou1FtCQMlJKPfLU0uf38Zdj4z98-Qs1vER_u7eDpGO3B5BSJXuJjjYNiCrtI38A-bsXjwLhd48WbDoU-PEv6Af9Cz-d63USDzsOg3c02rROyd8VZ5pSzkvtIQfn8jQoQ1kqpfbJUa2oFcwqM5JpWjllufAQliCaGcbAKpBP-1J-hxmQ6gXOEjfYJdF0QRwrH6tpVhWGaElC1o8G45gKdhBWPZskcY5QWe_nn7BU6SM1USEbpNWos5yu48Zi-NLdxN78ANJGdRQ |
| linkProvider | IEEE |
| linkToHtml | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwjV1JSwMxFA5aD3pyq7g7B68znWSSTOYoxVK1LYVW6K1keYMiXehyqL_eLG1F8eAtk4FhQgjfey_f9z2E7hkBJg3lcUZAxNQiZiyUr8RZsAdsSsicwLnd4c1X-jxgg7XPttfCAIAnn0Hihv4u30z00pXKatziExO7aI9RSlkQa20LKs5LrmAhNRdpljGRbRx2Ns_5-loTp0XtqVd_6DmtXp6Ez_5or-LRpXEYZNtzb0roSCUfyXKhEv35y7Lxnz9-hKrfMr6ouwWoY7QD41PEu4GRNXKaqch4AkdkI9do5Di3q2j-Jl2pL5oGBYF9IWczuaqifuOxX2_G6-YJ8btgNDbC6JzZWEHYDI5w4FrnubTpUimJ5tQIUDmTpDBUM2VjKI4lVpSBFpAbbs_9GaqMJ2M4R5GSNoUuU2xwamhZmiJVVBIMojTEWddcoBO34uE02GMMw2Iv_5y9Q_vNfrs1bD11Xq7QQWitgmNCrlFlMVvCjUX4hbr1O_sFp4ygkg |
| openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=proceeding&rft.title=1997+IEEE+International+Symposium+on+Circuits+and+Systems&rft.atitle=Programmable+design+for+memory+sharing+processor+array&rft.au=Li%2C+D.&rft.au=Kunjeda%2C+H.&rft.date=2002-11-22&rft.pub=IEEE&rft.isbn=9780780335837&rft.volume=3&rft.spage=2048&rft.epage=2051+vol.3&rft_id=info:doi/10.1109%2FISCAS.1997.621558&rft.externalDocID=621558 |
| thumbnail_l | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=9780780335837/lc.gif&client=summon&freeimage=true |
| thumbnail_m | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=9780780335837/mc.gif&client=summon&freeimage=true |
| thumbnail_s | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=9780780335837/sc.gif&client=summon&freeimage=true |