Comparative Performance Analysis of Intel (R) Xeon Phi (TM), GPU, and CPU: A Case Study from Microscopy Image Analysis

• Published in: 2014 IEEE 28th International Parallel and Distributed Processing Symposium Vol. 2014; pp. 1063 - 1072
• Main Authors: Teodoro, George, Kurc, Tahsin, Jun Kong, Cooper, Lee, Saltz, Joel
• Format: Conference Proceeding Journal Article
• Language: English
• Published: United States IEEE 01.05.2014
• Subjects: Graphics processing units; Image analysis; Image segmentation; Instruction sets; Microscopy; Microwave integrated circuits; Vegetation
• ISBN: 1479937991; 9781479937998
• ISSN: 1530-2075; 1045-9219; 1558-2183
• DOI: 10.1109/IPDPS.2014.111

We study and characterize the performance of operations in an important class of applications on GPUs and Many Integrated Core (MIC) architectures. Our work is motivated by applications that analyze low-dimensional spatial datasets captured by high resolution sensors, such as image datasets obtained from whole slide tissue specimens using microscopy scanners. Common operations in these applications involve the detection and extraction of objects (object segmentation), the computation of features of each extracted object (feature computation), and characterization of objects based on these features (object classification). In this work, we have identify the data access and computation patterns of operations in the object segmentation and feature computation categories. We systematically implement and evaluate the performance of these operations on modern CPUs, GPUs, and MIC systems for a microscopy image analysis application. Our results show that the performance on a MIC of operations that perform regular data access is comparable or sometimes better than that on a GPU. On the other hand, GPUs are significantly more efficient than MICs for operations that access data irregularly. This is a result of the low performance of MICs when it comes to random data access. We also have examined the coordinated use of MICs and CPUs. Our experiments show that using a performance aware task strategy for scheduling application operations improves performance about 1.29× over a first-come-first-served strategy. This allows applications to obtain high performance efficiency on CPU-MIC systems - the example application attained an efficiency of 84% on 192 nodes (3072 CPU cores and 192 MICs).