Background ADC calibration in digital domain
A 100 MS/s pipelined ADC is digitally calibrated by a slow SigmaDelta ADC using a least-mean-square (LMS) algorithm. Both linear and nonlinear memoryless residue gain errors of the pipeline stages are adaptively corrected. With a 411 kHz sinusoidal input, the peak SNDR improves from 28 dB to 59 dB a...
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| Published in | 2008 IEEE Custom Integrated Circuits Conference pp. 301 - 304 |
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| Main Authors | , , , , , , |
| Format | Conference Proceeding |
| Language | English |
| Published |
IEEE
01.09.2008
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| Subjects | |
| Online Access | Get full text |
| ISBN | 9781424420186 1424420180 |
| ISSN | 0886-5930 |
| DOI | 10.1109/CICC.2008.4672081 |
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| Abstract | A 100 MS/s pipelined ADC is digitally calibrated by a slow SigmaDelta ADC using a least-mean-square (LMS) algorithm. Both linear and nonlinear memoryless residue gain errors of the pipeline stages are adaptively corrected. With a 411 kHz sinusoidal input, the peak SNDR improves from 28 dB to 59 dB and the SFDR improves from 29 dB to 68 dB. The complete 0.13 mu ADC SoC occupies a die size of 3.7 mm times 4.7 mm, and consumes a total power of 448 mW. |
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| AbstractList | A 100 MS/s pipelined ADC is digitally calibrated by a slow SigmaDelta ADC using a least-mean-square (LMS) algorithm. Both linear and nonlinear memoryless residue gain errors of the pipeline stages are adaptively corrected. With a 411 kHz sinusoidal input, the peak SNDR improves from 28 dB to 59 dB and the SFDR improves from 29 dB to 68 dB. The complete 0.13 mu ADC SoC occupies a die size of 3.7 mm times 4.7 mm, and consumes a total power of 448 mW. |
| Author | Brodersen, R. Cheongyuen Tsang Hoyos, S. Yun Chiu Nikolic, B. Vanderhaegen, J. Chen, C. |
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| Snippet | A 100 MS/s pipelined ADC is digitally calibrated by a slow SigmaDelta ADC using a least-mean-square (LMS) algorithm. Both linear and nonlinear memoryless... |
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| SubjectTerms | Calibration CMOS analog integrated circuits CMOS digital integrated circuits CMOS technology Digital filters Error correction Operational amplifiers Pipelines Transfer functions Voltage |
| Title | Background ADC calibration in digital domain |
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