Building High-Performance Application Protocol Parsers on Multi-core Architectures

• Published in: 2011 IEEE 17th International Conference on Parallel and Distributed Systems pp. 188 - 195
• Main Authors: Kai Zhang, Junchang Wang, Bei Hua, Xinan Tang
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.12.2011
• Subjects: Buildings; Flexible printed circuits; Highperformance Network Processing; Multi-core; Multicore processing; Pipelines; Protocol Parser; Protocols; Servers
• ISBN: 1457718758; 9781457718755
• ISSN: 1521-9097
• DOI: 10.1109/ICPADS.2011.37

Parsing packet payloads according to the syntax and semantics of an application protocol is a key step in analyzing network traffic. However, it is still a challenge to fulfill this task with high speed(10Gbps+) because parsing packets through deep-content analysis to build a corresponding syntax tree requires tremendous computing resources. Multi-core architectures provide a viable solution for building high-performance parsers for application protocols. Existing sequential application protocol parsers are hard to be reused, and building a new protocol parser from scratch is error-prone and time-consuming. This paper proposes a general and efficient approach to building high-performance parallel application protocol parsers on multi-core platforms. First, the open-source lexical analyzer FLEX is used to describe a protocol and generate a sequential parser. Then a source-to-source translation is performed to transform the sequential parser into a parallel one. Finally, an efficient parallel run-time system is built by employing lock-free design principles from top to bottom to support multi-threaded execution on multi-core processors. Experimental results show that our parsers achieve nearly 20Gbps for average HTTP packets and 5Gbps for the challenging smaller FIX packets.