A 0.6-to-1V inverter-based 5-bit flash ADC in 90nm digital CMOS

A 0.6-to-1 V inverter-based 5-bit flash ADC in 90 nm digital CMOS is presented. Single-ended comparators are formed using digital inverters and resistors. The comparators are designed for compatibility with nanoscale CMOS lithography. A single-ended flash architecture was used without a front-end sa...

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Bibliographic Details
Published in2008 IEEE Custom Integrated Circuits Conference pp. 153 - 156
Main Authors Proesel, J.E., Pileggi, L.T.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.09.2008
Subjects
Analog circuits
CMOS digital integrated circuits
Control systems
Frequency
Inverters
Lithography
Resistors
Threshold voltage
Topology
USA Councils
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ISBN9781424420186
1424420180
ISSN0886-5930
DOI10.1109/CICC.2008.4672046

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Summary:A 0.6-to-1 V inverter-based 5-bit flash ADC in 90 nm digital CMOS is presented. Single-ended comparators are formed using digital inverters and resistors. The comparators are designed for compatibility with nanoscale CMOS lithography. A single-ended flash architecture was used without a front-end sample-and-hold. The ADC achieves a low frequency effective number of bits (ENOB) between 4.08 bits and 4.45 bits without calibration. Voltage scaling is demonstrated by 60 MS/s, 300 MS/s, and 600 MS/s operation at 0.6 V, 0.8 V, and 1 V, respectively. Power scales from 1.3 mW to 6.7 mW.
ISBN:9781424420186
1424420180
ISSN:0886-5930
DOI:10.1109/CICC.2008.4672046