APA (7th ed.) Citation

Abe, S., Yanagisawa, M., & Togawa, N. (2012, May). An energy-efficient high-level synthesis algorithm for huddle-based distributed-register architectures. 2012 IEEE International Symposium on Circuits and Systems (ISCAS), 576-579. https://doi.org/10.1109/ISCAS.2012.6272096

Chicago Style (17th ed.) Citation

Abe, Shin-ya, M. Yanagisawa, and N. Togawa. "An Energy-efficient High-level Synthesis Algorithm for Huddle-based Distributed-register Architectures." 2012 IEEE International Symposium on Circuits and Systems (ISCAS) May. 2012: 576-579. https://doi.org/10.1109/ISCAS.2012.6272096.

MLA (9th ed.) Citation

Abe, Shin-ya, et al. "An Energy-efficient High-level Synthesis Algorithm for Huddle-based Distributed-register Architectures." 2012 IEEE International Symposium on Circuits and Systems (ISCAS), May. 2012, pp. 576-579, https://doi.org/10.1109/ISCAS.2012.6272096.