Genetic algorithm based topology generation for application specific Network-on-Chip

• Published in: 2010 IEEE International Symposium on Circuits and Systems (ISCAS) pp. 3156 - 3159
• Main Authors: Choudhary, N, Gaur, M S, Laxmi, V, Singh, V
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.05.2010
• Subjects: Application software; Bandwidth; Character generation; Computer networks; Genetic algorithms; Genetic engineering; Network topology; Network-on-a-chip; Routing; System recovery
• ISBN: 1424453089; 9781424453085
• ISSN: 0271-4302
• DOI: 10.1109/ISCAS.2010.5537952

Network-on-Chip (NoC) has been proposed as a solution for the communication challenges of System-on-chip (SoC) design in nanoscale technologies. Application specific SoC design offers the opportunity for incorporating custom NoC architectures that are more suitable for a particular application, and do not necessarily conform to regular topologies. The aim is to generate a custom NoC that maximizes performance under the given resource constraints. The paper presents a heuristic technique based on genetic algorithm for synthesis of custom NoC architectures along with requisite routing tables with the objective to improve communication load distributions in the network subject to the resource constraints in such a way that the overall communication throughput and latency improves.