A parallel architecture for high speed BLAST using FPGA

• Published in: Iranian Conference on Electrical Engineering pp. 57 - 61
• Main Authors: Mahmoodi, Mohammad Reza, Nikaein, Hossein, Fahimi, Zahra
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.05.2014
• Subjects: Algorithm design and analysis; BLAST Algorithm; Computer architecture; Field programmable gate arrays; FPGA; Hardware Implementation; Indexes; Random access memory; Sequence Searching; Software
• ISSN: 2164-7054
• DOI: 10.1109/IranianCEE.2014.6999503

Undoubtedly, Basic Local Alignment Search Tool is one of the most prevalent algorithms in sequence searching and bioinformatics. BLAST is an index-based approach in order to recognize an unknown string of DNA sequence and due to its high computational nature, different types of hardware configurations have been proposed. In this paper, the traditional algorithm is applied; however a new architecture is proposed to speed up the algorithm. The design consists of a workstation and a FPGA as an accelerator. The system is based on 41 parallel cores implemented on Xilinx XC4VFX100 FPGA device. The most appealing features of this design are its speed and long input streams. Queries and subjects up to thousands of characters are processed in this architecture and it is verified to be 75.1 faster than NCBI software run at 3GHz, Pentium4 system.