Impulse C vs. VHDL for Accelerating Tomographic Reconstruction

• Published in: 2010 18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines pp. 171 - 174
• Main Authors: Xu, Jimmy, Subramanian, Nikhil, Alessio, Adam, Hauck, Scott
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.05.2010
• Subjects: Acceleration; Algorithm design and analysis; CT Scan; Design methodology; Field programmable gate arrays; FPGA; Hardware design languages; Impulse C; Performance analysis; Process design; Software performance; Tomographic Reconstruction
• ISBN: 9781424471423; 0769540562; 9780769540566; 1424471427
• DOI: 10.1109/FCCM.2010.33

While traditional methods of designing FPGA applications have relied on schematics or HDL, much interest has been shown in C-to-FPGA tool flows that allow users to design FPGA hardware in C. We evaluate a C-to-FPGA tool flow (Impulse C) by analyzing the performance of three independent implementations of the Computed tomography (CT) filtered backprojection (FBP) algorithm developed using C, Impulse C, and VHDL respectively. In the process, we compare the design process of Impulse C versus HDL, and discuss the benefits and challenges of using Impulse C. In addition, we explore the benefits of tightly-coupled FPGA acceleration offered by the XtremeData XD1000. The results of this paper demonstrate that Impulse C designs can achieve over 61x improvement over multi-threaded software (8 threads), and close to the same performance as VHDL, while significantly reducing the design effort, and that tightly-coupled FPGA coprocessors like the XD1000 effectively overcomes the traditional communication bottleneck between CPU and FPGA.