A proved dither-injection method for memory effect in double sampling pipelined ADC

Double sampling pipelined ADC is solution for high speed ADC besides TI ADC. However, memory effect is introduced for lack of the reset phase between two sampling. Dither-injection method is a choice for calibrating the memory effect but it has to balance the accuracy of the output with the converge...

Full description

Saved in:
Bibliographic Details
Published inProceedings 2017 IEEE 12th International Conference on ASIC : October 25-28, 2017, Guiyang, China pp. 754 - 757
Main Authors Fubiao Cao, Yongzhen Chen, Yuefeng Cao, Fan Ye, Junyan Ren
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.10.2017
Subjects
Calibration
Capacitors
Clocks
Convergence
MATLAB
Simulation
Switches
Online AccessGet full text
DOI10.1109/ASICON.2017.8252585

Cover

More Information
Summary:Double sampling pipelined ADC is solution for high speed ADC besides TI ADC. However, memory effect is introduced for lack of the reset phase between two sampling. Dither-injection method is a choice for calibrating the memory effect but it has to balance the accuracy of the output with the convergence speed. This paper presents a different transfer curve model to reduce the convergence cycles. This method is realized using a LMS algorithm to calibrate memory effect and incomplete settling error. Test in MATLAB shows a 12bit pipelined ADC can converge in 10 5 cycle and achieve 87.87dBc SFDR and 10.7bit ENOB.
DOI:10.1109/ASICON.2017.8252585