Voltage references for ultra-low supply voltages
The majority of integrated voltage references have, so far, been limited to a minimum supply voltage above 0.7-V often due to the voltage headroom required for the forward-biased operation of a PN-junction. This paper reviews design techniques for low voltage reference design and explores the feasib...
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Published in | 2008 IEEE Custom Integrated Circuits Conference pp. 715 - 720 |
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Main Authors | , , , , |
Format | Conference Proceeding |
Language | English |
Published |
IEEE
01.09.2008
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Subjects | |
Online Access | Get full text |
ISBN | 9781424420186 1424420180 |
ISSN | 0886-5930 |
DOI | 10.1109/CICC.2008.4672187 |
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Summary: | The majority of integrated voltage references have, so far, been limited to a minimum supply voltage above 0.7-V often due to the voltage headroom required for the forward-biased operation of a PN-junction. This paper reviews design techniques for low voltage reference design and explores the feasibility of designing a voltage reference with a supply voltage below 0.7-V in a standard CMOS process. Two ultra-low-voltage solutions are explored in detail, a reference circuit based on CMOS compatible Schottky diodes and a MOS-only reference circuit. |
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ISBN: | 9781424420186 1424420180 |
ISSN: | 0886-5930 |
DOI: | 10.1109/CICC.2008.4672187 |