An FPGA-based algorithm development framework for estimating the accuracy of embedded DSP signal transforms

This work addresses the problem of estimating the accuracy of a certain class of digital signal processing algorithms, known as linear signal transforms, when implemented on field programmable gate array (FPGA) hardware computational structure (HCS) units. A solution is provided through the formulat...

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Bibliographic Details
Published inConference proceedings : Midwest Symposium on Circuits and Systems pp. 643 - 646
Main Authors Davila-Montero, Sylmarie, Castillo-Torres, Keisha, Reyes-Rodriguez, Violeta, Jimenez, Manuel, Rodriguez, Domingo
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.08.2017
Subjects
Digital signal processing
Estimation
Hardware
Signal processing algorithms
Software
Software algorithms
Transforms
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ISSN1558-3899
DOI10.1109/MWSCAS.2017.8053005

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Summary:This work addresses the problem of estimating the accuracy of a certain class of digital signal processing algorithms, known as linear signal transforms, when implemented on field programmable gate array (FPGA) hardware computational structure (HCS) units. A solution is provided through the formulation of a hardware development framework which uses complex multipliers and complex addition units as its basic functional primitives to arrive at an estimation formulation of embedded signal processing operations.
ISSN:1558-3899
DOI:10.1109/MWSCAS.2017.8053005