An on-chip process control monitor for process variability measurements in nanometer technologies

Process variability has become a fundamental challenge in nanometer technologies. This trend is driven by Moore's law, which governs the exponential growth of transistors in ICs, the low-power requirements of mobile devices (i.e., Vdd < 1 V), and the shrinking geometries of advanced technolo...

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Bibliographic Details
Published in2009 IEEE International Conference on IC Design and Technology pp. 203 - 206
Main Authors Klass, F., Jain, A., Hess, G.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.05.2009
Subjects
Circuits
Clocks
CMOS process
CMOS technology
Device mismatch
electrical variable measurements
Inverters
Jitter
Logic
Monitoring
Phase change materials
Process control
process variability
random variations
statistics
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ISBN1424429331
9781424429332
ISSN2381-3555
DOI10.1109/ICICDT.2009.5166296

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Summary:Process variability has become a fundamental challenge in nanometer technologies. This trend is driven by Moore's law, which governs the exponential growth of transistors in ICs, the low-power requirements of mobile devices (i.e., Vdd < 1 V), and the shrinking geometries of advanced technologies reaching the sub-nanometer dimensions. Understanding process variability is therefore key to successfully designing ultra low-power multi-million gate SoCs. An all-digital on-chip process control-monitor (PCM) that measures process variability is described. It is implemented in a 65 nm dual-oxide triple-Vt bulk CMOS process and it measures 0.41 mm2.
ISBN:1424429331
9781424429332
ISSN:2381-3555
DOI:10.1109/ICICDT.2009.5166296