Co-design of Thermal Management with System Architecture and Power Management for 3D ICs

• Published in: Proceedings / Electronic Components Conference pp. 211 - 220
• Main Authors: Roy, Rishav, Das, Shidhartha, Labbe, Benoit, Mathur, Rahul, Jeloka, Supreet
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.05.2022
• Subjects: 3D ICs; Cooling; Electronic packaging thermal management; power management; Power system management; Power system measurements; Stacking; Systems architecture; thermal management; Three-dimensional displays
• ISSN: 2377-5726
• DOI: 10.1109/ECTC51906.2022.00044

The stacking of multiple dies to create 3D ICs has offered an attractive avenue to counter the slowing of Moore's law. Stacking dies, however, leads to increased power densities that require effective heat extraction mechanisms. In this work, we perform thermal simulations to study the impact of stacking dies. The package is subject to air-based and liquid-based cooling solutions, under significantly different heat transfer coefficients. A case study is performed on a many-core 3D system to investigate the thermal impact of introducing dedicated low dropout regulators (LDOs) in 3D ICs. These LDOs enable percore dynamic voltage and frequency scaling (DVFS) for efficient power management but potentially add thermal hot spots. We also study the transient thermal behavior of a package subject to different cooling solutions, providing guidelines for thermal throttling. This study demonstrates that system architecture design guided by thermal considerations can effectively utilize the power management efficiencies of 3D ICs without exceeding thermal limits.