FPGA Implementation of Yinyang K-Means Clustering

• Published in: Annual IEEE India Conference pp. 219 - 224
• Main Authors: M, Deepa, S, Soundarya, S, Reshma, B, Aakash, T, Srivarsa, R, Vidhyapriya
• Format: Conference Proceeding
• Language: English
• Published: IEEE 14.12.2023
• Subjects: Clustering; Clustering algorithms; Field programmable gate arrays; Filtering; Filtering algorithms; FPGA; Logic gates; PYNQ; Python; Yinyang
• ISSN: 2325-9418
• DOI: 10.1109/INDICON59947.2023.10440752

Popular clustering approaches like K-means are computationally intensive, especially when applied to big dimensional datasets. The K-means algorithm is effective in extracting important information from a dataset, such as the optimum distance measure. The fundamental issue with the standard K-means solution is that it does a lot of redundant effort when recalculating distances for samples that will not affect the cluster. The Yinyang K-approach has a set of rules which surpasses different K-approach algorithms through clustering the centres in the preliminary level and exploiting correctly maintained lower and higher limitations between every point and the cluster centres. It uses two filters to detect which distance calculations are unneeded and prevents them from being performed. These algorithms can be written in any coding language, including C, CPP, and Python. Clustering methods can be greatly accelerated using FPGA technology. Field programmable gate arrays (FPGAs), such as the PYNQ board, are particularly attractive for implementing clustering algorithms for huge datasets because of their reconfigurability, compact size, and high processing power. With the goal of proving the utility of the Yinyang K-means algorithm, we compared both methodologies by implementing them in an IDE run locally in a CPU as well as a PYNQ board.