Sneak Path Aware Bit-Flipping Algorithm for ReRAM Crossbar Array

• Published in: International Conference on Information and Communication Technology Convergence (Print) pp. 451 - 454
• Main Authors: Kim, Myungin, Ha, Jeongseok
• Format: Conference Proceeding
• Language: English
• Published: IEEE 19.10.2022
• Subjects: BF algorithm; Decoding; Error analysis; Interference; LDPC codes; Monte Carlo methods; Parity check codes; ReRAM; Resistance; Resistive RAM; sneak path
• ISSN: 2162-1241
• DOI: 10.1109/ICTC55196.2022.9952863

Resistive random access memory (ReRAM) has unique features such as fast data processing speed, non-volatility and high density and thus has been gaining popularity in a wider range storage applications. Meanwhile, ReRAM suffers from read errors mainly due to the variations of cell resistance and the sneak path problem. There have been efforts to cope with the read errors using error-correcting codes such as low-density parity-check (LDPC) codes and Bose-Chaudhuri-Hocquenghem (BCH) codes. In this paper, we propose a simple bit-flipping (BF) decoding algorithm for correcting read errors in ReRAM due to the sneak paths and show that the proposed algorithm efficiently resolves the sneak path problem at reduced complexity. In particular, we assume that ReRAM provides certain side information about the reliability of retrieved bits, and the proposed algorithm utilizes the side information in the decoding. Error-rate performance of the proposed algorithm is compared with that of an existing BF algorithm, which shows a clear performance improvement with the proposed one.