Structural Data Compression for Embedded Long Prediction Horizon Model Predictive Control on Resource-Constrained FPGA Platforms

• Published in: 2019 1st International Conference on Electrical, Control and Instrumentation Engineering (ICECIE) pp. 1 - 7
• Main Authors: Rheinlander, Carl C., Berkel, Felix, Douglas, Maycon, Schafer, Matthias, Wehn, Norbert, Liu, Steven
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.11.2019
• Subjects: Data compression; Energy efficiency; Field programmable gate arrays; Hardware; Instruments; Logic gates; Memory management; Optimization; Power systems; Predictive control
• DOI: 10.1109/ICECIE47765.2019.8974744

The control of infrastructure systems, such as the electric power supply, water distribution or traffic networks, is challenging for many reasons. The systems are large-scale, highly complex, subject to constraints and require a safe and cost-efficient operation. An appropriate control method is Model Predictive Control (MPC). Because of its inherent continuous optimization, MPC is known to be a compute- and, especially for large systems, memory-intensive process. Hence, MPC was unfeasible for energy-constrained embedded implementations for a long time. Recently, this issue has been overcome by utilizing highly energy-efficient hardware platforms like Field Programmable Gate Arrays (FPGAs). However, the amount of available memory on an FPGA restricts the achievable system size of MPC implementations. Therefore, the realization of large MPC systems like those requiring long prediction horizons is difficult on FPGAs. This paper proposes structural data compression (SDC), a technique that drastically lowers the memory demand of embedded MPC on FPGAs. We show how SDC can reduce the memory requirements by a factor higher than 80x compared to common code-generated MPC designs, thereby enabling MPC systems that require long prediction horizons to be implemented on an embedded device.