Open-Scale: A Scalable, Open-Source NOC-based MPSoC for Design Space Exploration

• Published in: 2011 International Conference on Reconfigurable Computing and FPGAs pp. 357 - 362
• Main Authors: Busseuil, R., Barthe, L., Almeida, G. M., Ost, L., Bruguier, F., Sassatelli, G., Benoit, P., Robert, M., Torres, L.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.11.2011
• Subjects: Clocks; Hardware; Memory management; MPSoCs; NoC; Protocols; Random access memory; RTOS; Software
• ISBN: 9781457717345; 1457717344
• ISSN: 2325-6532
• DOI: 10.1109/ReConFig.2011.66

As complexity of embedded system increases, configurable hardware is becoming more attractive because it provides a fast and efficient basis for design development. As a consequence, one of the most promising embedded architecture consists in the replication of Processing Elements (PEs) connected through a Network-on-Chip (NoC). Such architectures provide computation parallelism, scalability, and reduced design time thanks to reusability. This paper describes the development of a scalable, distributed memory, open source NoC-based platform called Open-Scale and its implementation into FPGA devices. The main objective of this platform is to provide a complete framework for research development on NoC-based distributed memory MPSoCs.