基于FPGA的高速信号采集电路的设计与实现

为了解决高速信号采集过程中的数据量大、实时性、传输速率等问题,设计了一种基于FPGA的高速信号采集系统。设计中采用了自顶向下的方法,将FPGA依据功能划分为几个模块,详细论述了各模块的设计方法和控制流程。FPGA模块设计使用VHDL语言,在Xilinx ISE中实现软件设计,调用Modelsim仿真工具完成仿真实验。实验数据表明：该信号采集系统的采样精度为8 bit,采样速率为600k Sps,并且具有电路简单、采集精度高、采样速率快、可靠性和稳定性强,通用性和移植性好等特点,完全达到了预期效果,具有一定实用价值和广泛的应用前景。...

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Bibliographic Details
Published in实验室研究与探索 Vol. 34; no. 4; pp. 124 - 128
Main Author 邬琦 杨江涛 马喜宏
Format Journal Article
LanguageChinese
Published 中北大学计算机与控制工程学院,山西太原,030051%中北大学电子测试技术国家重点实验室,山西太原030051 2015
中北大学仪器科学与动态测试教育部重点实验室,山西太原030051
Subjects
FPGA
VHDL
信号采集
高速
信号采集
VHDL
signal acquisition
高速
FPGA
high-speed
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ISSN1006-7167

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Summary:为了解决高速信号采集过程中的数据量大、实时性、传输速率等问题,设计了一种基于FPGA的高速信号采集系统。设计中采用了自顶向下的方法,将FPGA依据功能划分为几个模块,详细论述了各模块的设计方法和控制流程。FPGA模块设计使用VHDL语言,在Xilinx ISE中实现软件设计,调用Modelsim仿真工具完成仿真实验。实验数据表明：该信号采集系统的采样精度为8 bit,采样速率为600k Sps,并且具有电路简单、采集精度高、采样速率快、可靠性和稳定性强,通用性和移植性好等特点,完全达到了预期效果,具有一定实用价值和广泛的应用前景。
Bibliography:signal acquisition ; FPGA ; VHDL; high-speed
To solve the problem of large volume of data, real-time, transfer rate and other issues in the high-speed signal collection process, a high-speed signal acquisition system based on FPGA is designed. According to the method of top-down, FPGA is divided into several functional modules. The designing method and controlling flow of each module are discussed in detail. The VHDL language is adopted in the FPGA module. Software design is completed in the integration circumstance of Xilinx ISE, and system simulation is completed by Modelsim simulation tool. Signal acquisition experiment shows that： the signal acquisition system＇s sampling accuracy is 8 bits, sampling rate is 600 KSPS, and has a simple circuit, high acquisition accuracy and sampling rate, strong reliability and stability, good versatility and portability, and it can achieve the desired effect fully. Besides, it has a certain practical value and broad application prospects.
31-1707/T
WU Qi, YANG Jiang-tao , MA
ISSN:1006-7167