基于FPGA的Montgomery模乘器的高效实现

为了提高椭圆曲线密码处理器的模乘速度，提出了一种更有效且更适合硬件实现的Montgomery算法。改进的算法分析了基于CSA加法器的Montgomery模乘算法，提出了多步CSA加法器的Montgomery算法，该算法能够在一个时钟内做多次CSA迭代运算，可以有效地降低时钟个数，进而提高模乘速度。通过ModelSim仿真工具仿真，正确完成一次256位的Montgomery模乘运算只需要16个时钟周期。在Ahera EP3SL200F1517C2 FPGA中的运行结果表明，71．5MHz的时钟频率下，完成一次256位的模乘运算仅需要0．22μs。...

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Bibliographic Details
Published in计算机应用研究 Vol. 34; no. 11; pp. 3424 - 3427
Main Author 高献伟 张晓楠 董秀则
Format Journal Article
LanguageChinese
Published 西安电子科技大学,西安710071 2017
北京电子科技学院,北京100070%西安电子科技大学,西安,710071%北京电子科技学院,北京,100070
Subjects
Montgomery模乘算法
椭圆曲线密码
迭代运算
Montgomery modular multiplication algorithm
Montgomery模乘算法
迭代运算
elliptic curve cryptography(ECC)
椭圆曲线密码
iterative operation
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ISSN1001-3695
DOI10.3969/j.issn.1001-3695.2017.11.050

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Summary:为了提高椭圆曲线密码处理器的模乘速度，提出了一种更有效且更适合硬件实现的Montgomery算法。改进的算法分析了基于CSA加法器的Montgomery模乘算法，提出了多步CSA加法器的Montgomery算法，该算法能够在一个时钟内做多次CSA迭代运算，可以有效地降低时钟个数，进而提高模乘速度。通过ModelSim仿真工具仿真，正确完成一次256位的Montgomery模乘运算只需要16个时钟周期。在Ahera EP3SL200F1517C2 FPGA中的运行结果表明，71．5MHz的时钟频率下，完成一次256位的模乘运算仅需要0．22μs。
Bibliography:51-1196/TP
elliptic curve cryptography（ECC） ; Montgomery modular multiplication algorithm; iterative operation
Gao Xianwei1,2, Zhang Xiaonan1, Dong Xiuze2 （ 1. Xidian University, Xi＇ an 710071, China ; 2. Beijing Electronics Science ＆ Technology Institute, Beijing 100070, China ）
To improve the speed of modular multiplication operation on ECC processor, this paper proposed an improved Montgomery algorithm that was more efficient and suitable for hardware implementation. First, the improved algorithm analyzed the Montgomery modular multiplication algorithm based on CSA adder. Then it presented the multi,step CSA addar Montgomery algorithm, which could do repeatedly CSA iterations in one clock. Therefore, the improved modular multiplication could increase the speed of modular multiplication by reducing the number of clocks. Simulation with ModelSim indicates that an accurate completion of modular multiplication requires only 16 clock circles. And the simulation on Altera EP3 SL200F1517 C2 FPGA shows that a modular
ISSN:1001-3695
DOI:10.3969/j.issn.1001-3695.2017.11.050