基于FPGA的VPX时间统一系统设计

IRIG-B时间码（B码）因其性能优越,实现和使用方法简单易行,被广泛应用于靶场时间信息传递和各系统的时间同步,成为时统设备首选的标准码型。但随着大规模集成电路和可编程技术的发展,以及靶场对时统设备的稳定性、精准性和集成度要求越来越高,原有的IRIG-B码时统设备已不能满足要求。为了解决这些问题,提出了一种基于FPGA的VPX时间统一系统设计方案。该方案具有可靠性高、集成度高、操作简单、功能拓展性强、体积小等优点,并具有更广泛的实际应用价值。...

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Bibliographic Details
Published in电子技术应用 Vol. 44; no. 1; pp. 65 - 67
Main Author 王振;李建宏;张大松;王肖楠;黄毅龙
Format Journal Article
LanguageChinese
Published 华北计算机系统工程研究所,北京,100083 2018
Subjects
FPGA
IRIG-B码
时统系统
时统系统
FPGA
time unified system
IRIG-B码
IRIG-B code
Online AccessGet full text
ISSN0258-7998
DOI10.16157/j.issn.0258-7998.172617

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Summary:IRIG-B时间码（B码）因其性能优越,实现和使用方法简单易行,被广泛应用于靶场时间信息传递和各系统的时间同步,成为时统设备首选的标准码型。但随着大规模集成电路和可编程技术的发展,以及靶场对时统设备的稳定性、精准性和集成度要求越来越高,原有的IRIG-B码时统设备已不能满足要求。为了解决这些问题,提出了一种基于FPGA的VPX时间统一系统设计方案。该方案具有可靠性高、集成度高、操作简单、功能拓展性强、体积小等优点,并具有更广泛的实际应用价值。
Bibliography:Wang Zhen, Li Jianhong, Zhang Dasong, Wang Xiaonan, Huang Yilong （National Computer System Engineering Research Institute of China, Beijing 100083, China）
IRIG-B time code（ B code） becomes the suitable standard code for time system equipment because of its superior capaci-ty, simple implementation and easy deployment. IRIG-B code time system is used for time information transfer and time synchro-nization between different ranges in the shooting range system. However, with the development of large-scale integrated circuit and PLD, and with the enhancement of acquiring of integrability and programmability for timing equipment, conventional time unified system cannot meet the requirement. In order to solve those problems, we put forward a VPX time unified system design based on FPGA, which has the characters of high reliability and integrability, high operability and scalability, and small volume as well. In addition, the design implemented in this paper could support more applications.
time unified system ; FPGA
ISSN:0258-7998
DOI:10.16157/j.issn.0258-7998.172617