基于FPGA的DMA方式高速数据采集系统设计
提出了一种基于FPGA的DMA方式高速数据采集系统设计方案。该方案由底层控制器提供精确采样时序，保证ADC器件的采样吞吐；采用支持PCI协议的DMA方式的数据采集机制，优化数据采集存储及向上位机交互方式，以确保采集数据的高实时性。亥方案具有良好的移植性，可应用于采样速率高、数据采集量大、数据实时性要求高的数据采集系统。...
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| Published in | 电子技术应用 Vol. 37; no. 12; pp. 40 - 43 |
|---|---|
| Main Author | |
| Format | Journal Article |
| Language | Chinese |
| Published |
武汉软件工程职业学院电子系,湖北武汉,430074%华中科技大学数字制造与装备国家重点实验室,湖北武汉,430074
2011
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| Subjects | |
| Online Access | Get full text |
| ISSN | 0258-7998 |
| DOI | 10.3969/j.issn.0258-7998.2011.12.016 |
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| Abstract | 提出了一种基于FPGA的DMA方式高速数据采集系统设计方案。该方案由底层控制器提供精确采样时序，保证ADC器件的采样吞吐；采用支持PCI协议的DMA方式的数据采集机制，优化数据采集存储及向上位机交互方式，以确保采集数据的高实时性。亥方案具有良好的移植性，可应用于采样速率高、数据采集量大、数据实时性要求高的数据采集系统。 |
|---|---|
| AbstractList | TN274; 提出了一种基于FPGA的DMA方式高速数据采集系统设计方案.该方案由底层控制器提供精确采样时序,保证ADC器件的采样吞吐；采用支持PCI协议的DMA方式的数据采集机制,优化数据采集存储及向上位机交互方式,以确保采集数据的高实时性.该方案具有良好的移植性,可应用于采样速率高、数据采集量大、数据实时性要求高的数据采集系统. 提出了一种基于FPGA的DMA方式高速数据采集系统设计方案。该方案由底层控制器提供精确采样时序，保证ADC器件的采样吞吐；采用支持PCI协议的DMA方式的数据采集机制，优化数据采集存储及向上位机交互方式，以确保采集数据的高实时性。亥方案具有良好的移植性，可应用于采样速率高、数据采集量大、数据实时性要求高的数据采集系统。 |
| Author | 何琼 陈铁 程鑫 |
| AuthorAffiliation | 武汉软件工程职业学院电子系,湖北武汉430074 华中科技大学数字制造与装备国家重点实验室,湖北武汉430074 |
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| Author_FL | Chen Tie He Qiong Cheng Xin |
| Author_FL_xml | – sequence: 1 fullname: He Qiong – sequence: 2 fullname: Chen Tie – sequence: 3 fullname: Cheng Xin |
| Author_xml | – sequence: 1 fullname: 何琼 陈铁 程鑫 |
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| ClassificationCodes | TN274 |
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| Copyright | Copyright © Wanfang Data Co. Ltd. All Rights Reserved. |
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| DocumentTitleAlternate | Design of DMA mode high-speed data acquisition system based on FPGA |
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| EndPage | 43 |
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| Keywords | DMA 实时 高速 FPGA 数据采集系统 |
| Language | Chinese |
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| Notes | He Qiong,Chen Tie, Cheng Xin （1.Department of Electronic, Wuhan Vocational College of Software Engineering, Wuhan 430074, China; 2.State Key Lab of Digital Manufacturing Equipment ＆ Technology, Huazhong University of Science ＆ Technology, Wuhan 430074, China） FPGA ; DMA ; high-speed ; real-time ; data acquisition system This paper proposes a design scheme of DMA mode high-speed real-time data acquisition system based on FPGA. Bottom layer microcontroller provides precise data sampling timing sequence to ensure ADC sampling throughout. Data sampling mechanism under DMA mode supports PCI interface protocol, which ensures systematic high real-time performance. The scheme has excellent portability, can be applied in the data acquisition system which requires high sampling rate, large amount of data and high real-time performance. 11-2305/TN |
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| PublicationTitle | 电子技术应用 |
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| PublicationYear | 2011 |
| Publisher | 武汉软件工程职业学院电子系,湖北武汉,430074%华中科技大学数字制造与装备国家重点实验室,湖北武汉,430074 |
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| Snippet | 提出了一种基于FPGA的DMA方式高速数据采集系统设计方案。该方案由底层控制器提供精确采样时序，保证ADC器件的采样吞吐；采用支持PCI协议的DMA方式的数据采集机制，优化数据... TN274; 提出了一种基于FPGA的DMA方式高速数据采集系统设计方案.该方案由底层控制器提供精确采样时序,保证ADC器件的采样吞吐；采用支持PCI协议的DMA方式的数据采集机制,优... |
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| SubjectTerms | DMA FPGA 实时 数据采集系统 高速 |
| Title | 基于FPGA的DMA方式高速数据采集系统设计 |
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