APA (7th ed.) Citation

HSIAO, S., & SHIUE, W. (2001). A new hardware-efficient algorithm and architecture for computation of 2-D DCTs on a linear array. IEEE transactions on circuits and systems for video technology, 11(11), 1149-1159. https://doi.org/10.1109/76.964780

Chicago Style (17th ed.) Citation

HSIAO, Shen-Fu, and Wei-Ren SHIUE. "A New Hardware-efficient Algorithm and Architecture for Computation of 2-D DCTs on a Linear Array." IEEE Transactions on Circuits and Systems for Video Technology 11, no. 11 (2001): 1149-1159. https://doi.org/10.1109/76.964780.

MLA (9th ed.) Citation

HSIAO, Shen-Fu, and Wei-Ren SHIUE. "A New Hardware-efficient Algorithm and Architecture for Computation of 2-D DCTs on a Linear Array." IEEE Transactions on Circuits and Systems for Video Technology, vol. 11, no. 11, 2001, pp. 1149-1159, https://doi.org/10.1109/76.964780.