Memory-Efficient Hardware Architecture of 2-D Dual-Mode Lifting-Based Discrete Wavelet Transform

• Published in: IEEE transactions on circuits and systems for video technology Vol. 23; no. 4; pp. 671 - 683
• Main Authors: Hsia, Chih-Hsien, Chiang, Jen-Shiun, Guo, Jing-Ming
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.04.2013; Institute of Electrical and Electronics Engineers; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: 2-D dual-mode lifting-based discrete wavelet transform; Applied sciences; Architecture; Circuits; Clocks; Coding; Coding, codes; Design. Technologies. Operation analysis. Testing; Discrete Wavelet Transform; Discrete wavelet transforms; Electronics; Exact sciences and technology; Hardware; Image processing; Information, signal and communications theory; Integrated circuits; Integrated circuits by function (including memories and processors); JPEG2000; low transpose memory; Memory management; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Signal and communications theory; Signal processing; Studies; Surface layer; Telecommunications and information theory; Texture; Transform coding; Visual; Wavelet coefficients; Wavelet transforms; Video coding; Signal compression; Lossless circuit; Image processing; Scalability; 2-D dual-mode lifting-based discrete wavelet transform; Texture; Implementation; Video signal processing; Image coding; Wavelet base; Real time processing; Multidimensional system; JPEG2000; VLSI circuit; Lossy medium; Image compression; Decoding; Discrete wavelet transforms; Algorithm; Wavelet transformation; Storage management; Integrated circuit; Signal processing; Critical path; low transpose memory; Comparative study
• ISSN: 1051-8215; 1558-2205
• DOI: 10.1109/TCSVT.2012.2211953

Memory requirements (for storing intermediate signals) and critical path are essential issues for 2-D (or multidimensional) transforms. This paper presents new algorithms and hardware architectures to address the above issues in 2-D dual-mode (supporting 5/3 lossless and 9/7 lossy coding) lifting-based discrete wavelet transform (LDWT). The proposed 2-D dual-mode LDWT architecture has the merits of low transpose memory (TM), low latency, and regular signal flow, making it suitable for very large-scale integration implementation. The TM requirement of the N×N 2-D 5/3 mode LDWT and 2-D 9/7 mode LDWT are 2 N and 4 N , respectively. Comparison results indicate that the proposed hardware architecture has a lower lifting-based low TM size requirement than the previous architectures. As a result, it can be applied to real-time visual operations such as JPEG2000, motion-JPEG2000, MPEG-4 still texture object decoding, and wavelet-based scalable video coding applications.