Development and Challenges of Reliability Modeling from Transistors to Circuits

• Published in: IEEE journal of the Electron Devices Society Vol. 11; p. 1
• Main Authors: Yang, Xinhuan, Sang, Qianqian, Wang, Chuanzheng, Yu, Mingyan, Zhao, Yuanfu
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.01.2023; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Aging; Aging model; bias temperature instability (BTI); Circuit design; Circuit reliability; Degradation; Electronic systems; hot-carrier injection (HCI); Human computer interaction; Integrated circuit modeling; Integrated circuit reliability; Integrated circuits; Modelling; Optimization; Reliability; Reliability analysis; SPICE simulation; Transistors
• ISSN: 2168-6734; 2168-6734
• DOI: 10.1109/JEDS.2023.3253081

The integration density of electronic systems is limited by the reliability of the integrated circuits. To guarantee the overall performance, the integrated circuit reliability must be modeled and analyzed at the early design stage. This paper reviews some of the most important intrinsic aging mechanisms of MOSFETs and elaborates the physical mechanism of the coupling between aging effects. Then the progress in reliability modeling under static and dynamic operational voltages is reviewed. It is found that although these models can accurately predict the degradation in short term, they are with large errors for the long-term degradation prediction. Besides, for the circuit-level reliability modeling and simulation approach, there are still problems to be solved. This article aims to provide guidance for researchers and practitioners in integrated circuit field, and highlight the challenges for reliability research. It is of great significance to the optimization of the reliability of integrated circuits.