EKV3 compact modeling of MOS transistors from a 0.18 μm CMOS technology for mixed analog–digital circuit design at low temperature

• Published in: Cryogenics (Guildford) Vol. 49; no. 11; pp. 595 - 598
• Main Authors: Martin, P., Cavelier, M., Fascio, R., Ghibaudo, G., Bucher, M.
• Format: Journal Article Conference Proceeding
• Language: English
• Published: Kidlington Elsevier Ltd 01.11.2009; Elsevier
• Subjects: Applied sciences; Channels; Circuit design; CMOS; Cryogenics; EKV3 compact model; Energy; Energy. Thermal use of fuels; Exact sciences and technology; Low temperature; Mathematical models; Metal oxide semiconductors; MOSFET; MOSFETs; Refrigerating engineering. Cryogenics. Food conservation; Semiconductor devices; Transistors; MOSFET; EKV3 compact model; Low temperature; Analog circuit; Improvement; Simulation; Cryogenics; Digital circuit; Modeling
• ISSN: 0011-2275; 1879-2235
• DOI: 10.1016/j.cryogenics.2008.12.005

The standard version of the EKV3 compact model is evaluated for simulation of mixed analog–digital circuits working at low temperature (77–200 K). This evaluation is performed on a dual gate oxide CMOS technology with 0.18 μm/1.8 V and 0.35 μm/3.3 V MOSFET transistors. A detailed temperature analysis of some physical effects is performed. Specific effects, such as anomalous narrow channel effect, freeze-out in Lightly Doped drain (LDD) regions or quantization of the inversion charge, are observed at low or intermediate temperature. Some improvements of this compact model will allow a more accurate description of MOS transistors at low temperature.