Built-in redundancy analysis for memory yield improvement

With the advance of VLSI technology, the capacity and density of memories is rapidly growing. The yield improvement and testing issues have become the most critical challenges for memory manufacturing. Conventionally, redundancies are applied so that the faulty cells can be repairable. Redundancy an...

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Published inIEEE transactions on reliability Vol. 52; no. 4; pp. 386 - 399
Main Authors Huang, Chih-Tsun, Wu, Chi-Feng, Li, Jin-Fu, Wu, Cheng-Wen
Format Journal Article
LanguageEnglish
Published New York IEEE 01.12.2003
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects
Online AccessGet full text
ISSN0018-9529
1558-1721
DOI10.1109/TR.2003.821925

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Abstract With the advance of VLSI technology, the capacity and density of memories is rapidly growing. The yield improvement and testing issues have become the most critical challenges for memory manufacturing. Conventionally, redundancies are applied so that the faulty cells can be repairable. Redundancy analysis using external memory testers is becoming inefficient as the chip density continues to grow, especially for the system chip with large embedded memories. This paper presents three redundancy analysis algorithms which can be implemented on-chip. Among them, two are based on the local-bitmap idea: the local repair-most approach is efficient for a general spare architecture, and the local optimization approach has the best repair rate. The essential spare pivoting technique is proposed to reduce the control complexity. Furthermore, a simulator has been developed for evaluating the repair efficiency of different algorithms. It is also used for determining certain important parameters in redundancy design. The redundancy analysis circuit can easily be integrated with the built-in self-test circuit.
AbstractList With the advance of VLSI technology, the capacity and density of memories is rapidly growing. The yield improvement and testing issues have become the most critical challenges for memory manufacturing. Conventionally, redundancies are applied so that the faulty cells can be repairable. Redundancy analysis using external memory testers is becoming inefficient as the chip density continues to grow, especially for the system chip with large embedded memories. This paper presents three redundancy analysis algorithms which can be implemented on-chip. Among them, two are based on the local-bitmap idea: the local repair-most approach is efficient for a general spare architecture, and the local optimization approach has the best repair rate. The essential spare pivoting technique is proposed to reduce the control complexity. Furthermore, a simulator has been developed for evaluating the repair efficiency of different algorithms. It is also used for determining certain important parameters in redundancy design. The redundancy analysis circuit can easily be integrated with the built-in self-test circuit.
Redundancy analysis using external memory testers is becoming inefficient as the chip density continues to grow, especially for the system chip with large embedded memories.
Author Cheng-Wen Wu
Jin-Fu Li
Chih-Tsun Huang
Chi-Feng Wu
Author_xml – sequence: 1
  givenname: Chih-Tsun
  surname: Huang
  fullname: Huang, Chih-Tsun
– sequence: 2
  givenname: Chi-Feng
  surname: Wu
  fullname: Wu, Chi-Feng
– sequence: 3
  givenname: Jin-Fu
  surname: Li
  fullname: Li, Jin-Fu
– sequence: 4
  givenname: Cheng-Wen
  surname: Wu
  fullname: Wu, Cheng-Wen
BookMark eNqNkU1LxDAQhoMouLt69eKleNBT13xvctTFLxAE2XtI0ylE2nRNWqH_3sgKwoLiaRh4nndg3jk6DH0AhM4IXhKC9fXmdUkxZktFiabiAM2IEKokK0oO0QxjokotqD5G85Te8sq5VjOkb0ffDqUPRYR6DLUNbipssO2UfCqaPhYddH2cislDWxe-28b-AzoIwwk6amyb4PR7LtDm_m6zfiyfXx6e1jfPpWMrNZSyEsoyWjlXc6pZ7aTG1glqK1ZxilfQ1ABVY6XQxCouqSJWEqUrUnEJki3Q1S42H34fIQ2m88lB29oA_ZiMxkQqrYjK5OWfJNX5S_w_YE4jVIoMXuyBb_0Y83OSUYozjpmgGeI7yMU-pQiNcX6wg-_DEK1vDcHmqx6zeTVf9ZhdPVlb7mnb6Dsbp9-F853gAeAHphILjdkn8NuayA
CODEN IERQAD
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ContentType Journal Article
Copyright Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2003
Copyright_xml – notice: Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2003
DBID RIA
RIE
AAYXX
CITATION
7SP
8FD
L7M
7SC
JQ2
L~C
L~D
7TB
FR3
F28
DOI 10.1109/TR.2003.821925
DatabaseName IEEE All-Society Periodicals Package (ASPP) 1998–Present
IEEE Electronic Library (IEL)
CrossRef
Electronics & Communications Abstracts
Technology Research Database
Advanced Technologies Database with Aerospace
Computer and Information Systems Abstracts
ProQuest Computer Science Collection
Computer and Information Systems Abstracts – Academic
Computer and Information Systems Abstracts Professional
Mechanical & Transportation Engineering Abstracts
Engineering Research Database
ANTE: Abstracts in New Technology & Engineering
DatabaseTitle CrossRef
Technology Research Database
Advanced Technologies Database with Aerospace
Electronics & Communications Abstracts
Computer and Information Systems Abstracts
Computer and Information Systems Abstracts – Academic
ProQuest Computer Science Collection
Computer and Information Systems Abstracts Professional
Mechanical & Transportation Engineering Abstracts
Engineering Research Database
ANTE: Abstracts in New Technology & Engineering
DatabaseTitleList Engineering Research Database
Computer and Information Systems Abstracts
Technology Research Database

Technology Research Database
Database_xml – sequence: 1
  dbid: RIE
  name: IEEE Electronic Library (IEL)
  url: https://proxy.k.utb.cz/login?url=https://ieeexplore.ieee.org/
  sourceTypes: Publisher
DeliveryMethod fulltext_linktorsrc
Discipline Engineering
EISSN 1558-1721
EndPage 399
ExternalDocumentID 2429768661
10_1109_TR_2003_821925
1260590
GroupedDBID -~X
.DC
0R~
29I
4.4
5GY
5VS
6IK
8WZ
97E
A6W
AAJGR
AARMG
AASAJ
AAWTH
ABAZT
ABQJQ
ABVLG
ACGFO
ACGFS
ACIWK
ACNCT
AENEX
AETIX
AGQYO
AGSQL
AHBIQ
AI.
AIBXA
AKJIK
AKQYR
ALLEH
ALMA_UNASSIGNED_HOLDINGS
ASUFR
ATWAV
BEFXN
BFFAM
BGNUA
BKEBE
BPEOZ
CS3
DU5
EBS
EJD
H~9
IAAWW
IBMZZ
ICLAB
IDIHD
IFIPE
IFJZH
IPLJI
JAVBF
LAI
M43
MS~
OCL
P2P
RIA
RIE
RNS
TN5
VH1
VJK
AAYXX
CITATION
7SP
8FD
L7M
RIG
7SC
JQ2
L~C
L~D
7TB
FR3
F28
ID FETCH-LOGICAL-c378t-6b58a32bccd4293dc690ac52ab3b4207efdeebfa6591a846281a6189b1b46e63
IEDL.DBID RIE
ISSN 0018-9529
IngestDate Thu Oct 02 11:33:16 EDT 2025
Sun Sep 28 10:35:42 EDT 2025
Sat Sep 27 22:22:28 EDT 2025
Mon Jun 30 06:38:12 EDT 2025
Thu Apr 24 23:10:10 EDT 2025
Wed Oct 01 06:38:27 EDT 2025
Tue Aug 26 16:36:36 EDT 2025
IsPeerReviewed true
IsScholarly true
Issue 4
Language English
License https://ieeexplore.ieee.org/Xplorehelp/downloads/license-information/IEEE.html
LinkModel DirectLink
MergedId FETCHMERGED-LOGICAL-c378t-6b58a32bccd4293dc690ac52ab3b4207efdeebfa6591a846281a6189b1b46e63
Notes ObjectType-Article-1
SourceType-Scholarly Journals-1
ObjectType-Feature-2
content type line 14
ObjectType-Article-2
ObjectType-Feature-1
content type line 23
PQID 884340352
PQPubID 23500
PageCount 14
ParticipantIDs crossref_citationtrail_10_1109_TR_2003_821925
crossref_primary_10_1109_TR_2003_821925
proquest_journals_884340352
ieee_primary_1260590
proquest_miscellaneous_901689818
proquest_miscellaneous_29109418
proquest_miscellaneous_28181265
ProviderPackageCode CITATION
AAYXX
PublicationCentury 2000
PublicationDate 2003-12-01
PublicationDateYYYYMMDD 2003-12-01
PublicationDate_xml – month: 12
  year: 2003
  text: 2003-12-01
  day: 01
PublicationDecade 2000
PublicationPlace New York
PublicationPlace_xml – name: New York
PublicationTitle IEEE transactions on reliability
PublicationTitleAbbrev TR
PublicationYear 2003
Publisher IEEE
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher_xml – name: IEEE
– name: The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
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SSID ssj0014498
Score 2.1157126
Snippet With the advance of VLSI technology, the capacity and density of memories is rapidly growing. The yield improvement and testing issues have become the most...
Redundancy analysis using external memory testers is becoming inefficient as the chip density continues to grow, especially for the system chip with large...
SourceID proquest
crossref
ieee
SourceType Aggregation Database
Enrichment Source
Index Database
Publisher
StartPage 386
SubjectTerms Algorithm design and analysis
Algorithms
Built-in self-test
Chips (memory devices)
Circuit faults
Circuit simulation
Circuits
Costs
Density
Design engineering
Electrostatic precipitators
Local optimization
Random access memory
Redundancy
Repair
Studies
Testing
Very large scale integration
Title Built-in redundancy analysis for memory yield improvement
URI https://ieeexplore.ieee.org/document/1260590
https://www.proquest.com/docview/884340352
https://www.proquest.com/docview/28181265
https://www.proquest.com/docview/29109418
https://www.proquest.com/docview/901689818
Volume 52
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
journalDatabaseRights – providerCode: PRVIEE
  databaseName: IEEE Electronic Library (IEL)
  customDbUrl:
  eissn: 1558-1721
  dateEnd: 99991231
  omitProxy: false
  ssIdentifier: ssj0014498
  issn: 0018-9529
  databaseCode: RIE
  dateStart: 19630101
  isFulltext: true
  titleUrlDefault: https://ieeexplore.ieee.org/
  providerName: IEEE
link http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwjV1LT9wwEB7RPcGhtEDFsqX4gMSFLEn8WPvYoiKEBAe0SNwi23GkVWkWQXKAX8-Mk10QFNRbJI8sx_a8PDPfAOyjCqjyYPMkrZCbUEOgHPTCJLqSVleeqhspont-oU6vxNm1vF6Bw2UtTAghJp-FMX3GWH459y09lR1lZHwbdNA_TbTqarWWEQMhTC91kYFlbnqAxiw1R9PLiPs51sid1BL7hQKKHVXeiOGoW07W4Xyxqi6l5M-4bdzYP74CbPzfZX-Bz72RyX52t-IrrIR6A9ZeQA9ugvnVzm6aZFazu0CFZCRkme0RShhasuwv5eA-sAdKcWOz-PYQnxK3YHrye3p8mvRtFBLPJ7pJlJPa8tx5X6Ly4aVHh9h6mVvHncjTSajKEFxllTSZ1VSrmlmVaeMyJ1RQ_BsM6nkdtoFxLUNZ4lxGVOhWS6e0SivjjEBVy3M9hGSxtYXvIcap08VNEV2N1BTTS-p7yYvuKIZwsKS_7cA13qXcpH19puq2dAijxckVPe_dF1oLLgjmdQh7y1FkGoqE2DrM2_uCILBwCvkBBZpRRmT4S-wdCjSklDY40c6_1zaC1S7xj1JfvsOguWvDLhowjfsRb-4Tz1zspg
linkProvider IEEE
linkToHtml http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwjV1LT9wwEB4hOLQ9FCit2PLyoVIvzZLED-wjrYqWx3JAqcQtsh1HWpVmESQH-us742S3qC0Vt0geWY7teXlmvgH4gCqgzoPNk7RGbkINgXLQC5PoWlpde6pupIju9FJNvomza3m9Ap-WtTAhhJh8Fsb0GWP51dx39FR2mJHxbdBBX5NCCNlXay1jBkKYQe4iC8vcDBCNWWoOi6uI_DnWyJ_UFPuRCoo9Vf4SxFG7nKzDdLGuPqnk-7hr3dj__AOy8bkL34DXg5nJjvt7sQkroXkDrx6BD26B-dzNbtpk1rC7QKVkJGaZHTBKGNqy7Adl4T6wB0pyY7P4-hAfE99CcfK1-DJJhkYKiedHuk2Uk9ry3HlfofrhlUeX2HqZW8edyNOjUFchuNoqaTKrqVo1syrTxmVOqKD4O1ht5k3YBsa1DFWFcxlRo2MtndIqrY0zApUtz_UIksXWln4AGadeFzdldDZSUxZX1PmSl_1RjODjkv62h9d4knKL9vU3Vb-lI9hZnFw5cN99qbXggoBeR3CwHEW2oViIbcK8uy8JBAunkP-hQEPKiAx_iT1BgaaU0gYnev_vtR3Ai0kxvSgvTi_Pd-BlnwZIiTC7sNredWEPzZnW7cdb_AtWvO_z
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.atitle=Built-in+redundancy+analysis+for+memory+yield+improvement&rft.jtitle=IEEE+transactions+on+reliability&rft.au=Chih-Tsun+Huang&rft.au=Chi-Feng+Wu&rft.au=Jin-Fu+Li&rft.au=Cheng-Wen+Wu&rft.date=2003-12-01&rft.issn=0018-9529&rft.volume=52&rft.issue=4&rft.spage=386&rft.epage=399&rft_id=info:doi/10.1109%2FTR.2003.821925&rft.externalDBID=n%2Fa&rft.externalDocID=10_1109_TR_2003_821925
thumbnail_l http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/lc.gif&issn=0018-9529&client=summon
thumbnail_m http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/mc.gif&issn=0018-9529&client=summon
thumbnail_s http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/sc.gif&issn=0018-9529&client=summon