Exploiting Transistor Folding Layout as RHBD Technique Against Single-Event Transients

• Published in: IEEE transactions on nuclear science Vol. 67; no. 7; pp. 1581 - 1589
• Main Authors: Aguiar, Y. Q., Wrobel, F., Autran, J.-L., Kastensmidt, F. L., Leroux, P., Saigne, F., Pouget, V., Touboul, A. D.
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.07.2020; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Circuit design; Circuits; Digital electronics; Earth orbits; Energy transfer; Fingers; Folding; Heavy ions; Integrated circuits; International Space Station; Inverters; Ions; Layout; Layouts; Linear energy transfer (LET); Logic gates; Low earth orbits; Monte-Carlo simulation; Multinational space ventures; Protons; Radiation hardening; Radiation hardening (electronics); radiation hardening by design (RHBD); Robustness; Semiconductor devices; single-event transient (SET); Space applications; transistor folding; Transistors; Very large scale integration
• ISSN: 0018-9499; 1558-1578; 1558-1578
• DOI: 10.1109/TNS.2020.3003166

Radiation-hardening techniques can be extensively used in the design level to improve the robustness of very large-scale integration (VLSI) circuits used in space applications. Accordingly, this work analyzes the efficiency of transistor folding layout in improving the single-event transient (SET) robustness of digital circuits. Additionally, diffusion splitting is proposed to reduce the area overhead of multiple-finger designs. Besides increasing threshold linear energy transfer, results show that both techniques can also reduce the overall cross section and the in-orbit SET rate for protons and heavy ions in low-earth orbit (LEO) and international space station (ISS) orbits.