Reducing the Diameters of Computer Networks

We discuss three methods of reducing the diameters of computer networks by adding additional processor to processor links under the constraint that no more than one I/O port be added to each processor. This is equivalent to adding edges to a given graph under the constraint that the degree of any no...

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Bibliographic Details
Published inIEEE transactions on computers Vol. C-35; no. 8; pp. 757 - 761
Main Authors Bokhari, S. H., Raza, A. D.
Format Journal Article
LanguageEnglish
Published Legacy CDMS IEEE 01.08.1986
Institute of Electrical and Electronics Engineers
Subjects
Applied sciences
Array processors
Arrays
augmented networks
Binary trees
Computer networks
Computer science; control theory; systems
Computer Systems
Computer systems and distributed systems. User interface
diameter reduction
Electrons
Exact sciences and technology
Logic circuits
mapping problem
Multiplexing
nearest-neighbor arrays
Nickel
Parallel processing
perfect shuffle
Software
Vectors
Vegetation
Reduction
Array processor
Binary tree
Computer network
Perfect shuffle
Graph theory
Algorithm
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ISSN0018-9340
1557-9956
DOI10.1109/TC.1986.1676827

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Summary:We discuss three methods of reducing the diameters of computer networks by adding additional processor to processor links under the constraint that no more than one I/O port be added to each processor. This is equivalent to adding edges to a given graph under the constraint that the degree of any node be increased, at most, by one.
Bibliography:CDMS
Legacy CDMS
ISSN: 0018-9340
ObjectType-Article-2
SourceType-Scholarly Journals-1
ObjectType-Feature-1
content type line 23
ISSN:0018-9340
1557-9956
DOI:10.1109/TC.1986.1676827