Soft input decoder for high-rate generalised concatenated codes

• Published in: IET circuits, devices & systems Vol. 12; no. 4; pp. 432 - 438
• Main Authors: Spinner, Jens, Rohweder, Daniel, Freudenberger, Jürgen
• Format: Journal Article
• Language: English
• Published: Stevenage The Institution of Engineering and Technology 01.07.2018; John Wiley & Sons, Inc
• Subjects: algebraic decoding; BCH codes; Binary codes; bit-flipping strategy; Codes; coding gain; Complexity; computational complexity; Concatenated codes; Construction; Data storage; decoder architecture; Decoding; Embedded systems; erasure decoding; Error correction; Error correction & detection; error correction codes; extended BCH codes; flash memories; hard input decoding; high-rate GC codes; high-rate generalised concatenated codes; high-reliability data storage; inner extended binary Bose-Chaudhuri-Hocquenghem codes; integrated circuit reliability; low-complexity soft input decoder; low-complexity soft input decoding; outer error; outer Reed-Solomon codes; Parity; pipelined decoder architecture; Probability; Reed-Solomon codes; Research Article; soft decoding approach; soft input decoder; Transistors; algebraic decoding; soft input decoder; extended BCH codes; integrated circuit reliability; soft decoding approach; Reed-Solomon codes; decoder architecture; flash memories; inner extended binary Bose-Chaudhuri-Hocquenghem codes; low-complexity soft input decoding; pipelined decoder architecture; outer error; error correction; binary codes; error correction codes; high-rate generalised concatenated codes; low-complexity soft input decoder; decoding; high-reliability data storage; concatenated codes; high-rate GC codes; bit-flipping strategy; outer Reed-Solomon codes; coding gain; BCH codes; erasure decoding; hard input decoding; computational complexity
• ISSN: 1751-858X; 1751-8598; 1751-8598
• DOI: 10.1049/iet-cds.2017.0347

Generalised concatenated (GC) codes are well suited for error correction in flash memories for high-reliability data storage. The GC codes are constructed from inner extended binary Bose–Chaudhuri–Hocquenghem (BCH) codes and outer Reed–Solomon codes. The extended BCH codes enable high-rate GC codes and low-complexity soft input decoding. This work proposes a decoder architecture for high-rate GC codes. For such codes, outer error and erasure decoding are mandatory. A pipelined decoder architecture is proposed that achieves a high data throughput with hard input decoding. In addition, a low-complexity soft input decoder is proposed. This soft decoding approach combines a bit-flipping strategy with algebraic decoding. The decoder components for the hard input decoding can be utilised which reduces the overhead for the soft input decoding. Nevertheless, the soft input decoding achieves a significant coding gain compared with hard input decoding.