Application of hybrid ant colony algorithm to the design of analog wavelet optimized circuits

Facing the real-time and low-power requirements in non-smooth signal processing, the traditional digital wavelet transform method limits its efficiency and feasibility in practical applications due to the large amount of arithmetic and the need for A/D conversion. In order to overcome these shortcom...

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Bibliographic Details
Published inSystems and soft computing Vol. 7; p. 200184
Main Authors Ren, Quanhui, Meng, Chenyu
Format Journal Article
LanguageEnglish
Published Elsevier B.V 01.12.2025
Elsevier
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Online AccessGet full text
ISSN2772-9419
2772-9419
DOI10.1016/j.sasc.2025.200184

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Summary:Facing the real-time and low-power requirements in non-smooth signal processing, the traditional digital wavelet transform method limits its efficiency and feasibility in practical applications due to the large amount of arithmetic and the need for A/D conversion. In order to overcome these shortcomings, the study proposes an analog circuit design method for rational approximation of wavelet function using hybrid ant colony algorithm. The study performs constrained mathematical modeling of the wavelet approximation through the minimum mean square error criterion and optimizes it using the hybrid ant colony algorithm. Also, the study designs a current-mode circuit based on the operational transconductance amplifier and current controlled conveyor second generation for implementing the analog wavelet transform. The results revealed that the amplitude response of the hybrid ant colony algorithm optimized analog wavelet circuit design reached 0.93 with an error of only 3.33%. In conclusion, it can be concluded that the research on the application of hybrid ant colony algorithm in the design of analog wavelet optimized circuits effectively improves the accuracy of wavelet approximation, and provides a new technological path for the realization of highly efficient and low-cost signal processing circuits.
ISSN:2772-9419
2772-9419
DOI:10.1016/j.sasc.2025.200184