High Endurance Ferroelectric Hafnium Oxide-Based FeFET Memory Without Retention Penalty

• Published in: IEEE transactions on electron devices Vol. 65; no. 9; pp. 3769 - 3774
• Main Authors: Ali, T., Polakowski, P., Riedel, S., Buttner, T., Kampfe, T., Rudolph, M., Patzold, B., Seidel, K., Lohr, D., Hoffmann, R., Czernohorsky, M., Kuhnel, K., Steinke, P., Calvo, J., Zimmermann, K., Muller, J.
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.09.2018; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Durability; Endurance; Ferroelectric (FE); ferroelectric field-effect transistor (FeFET); Ferroelectric materials; Ferroelectricity; Field effect transistors; Hafnium oxide; Iron; Logic gates; metal–ferroelectric–insulator–semiconductor (MFIS); Permittivity; Retention; Semiconductor devices; Silicon dioxide; Switches; Tunneling
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2018.2856818

We report the integration of a ferroelectric (FE) silicon-doped hafnium oxide material in ferroelectric field-effect transistor (FeFET) devices fabricated with an optimized interfacial layer in a gate-first scheme. The effect of increasing the permittivity (k) value of the interface layer on the performance of the metal-ferroelectric-insulator-semiconductor (MFIS)-FE-HfO 2 FeFET is studied in terms of its switching characteristics, endurance, and retention. In contrast to the previous work, the FE Si:HfO 2 -integrated FeFET devices show a low-power operation capability as well as an improved endurance characteristics without jeopardizing high-temperature retention. The utilization of an optimized SiON interface layer for MFIS-HfO 2 FeFET stack is discussed, and the improvements are outlined with reference to a standard low-k SiO 2 interface.