Design optimization of low-power high-performance DSP building blocks

• Published in: IEEE journal of solid-state circuits Vol. 39; no. 7; pp. 1131 - 1139
• Main Authors: Gemmeke, T., Gansen, M., Stockmanns, H.J., Noll, T.G.
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.07.2004; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Channels; Chip scale packaging; CMOS technology; Design engineering; Design methodology; Design optimization; Devices; Digital signal processing; Digital signal processing chips; Disks; Finite impulse response filter; Hard disks; Optimization; Power dissipation; Silicon; Studies; Throughput
• ISSN: 0018-9200; 1558-173X
• DOI: 10.1109/JSSC.2004.829395

In recent years, power dissipation along with silicon area has become the key figure in chip design. The increasing demands on system performance require high-performance digital signal processing (DSP) systems to include dedicated number-crunching units as individually optimized building blocks. The various design methodologies in use stress one of the following figures: power dissipation, throughput, or silicon area. This paper presents a design methodology reducing any combination of cost drivers subject to a specified throughput. As a basic principle, the underlying optimization regards the existing interactions within the design space of a building block. Crucial in such optimization is the proper dimensioning of device sizes in contrast to the common use of minimal dimensions in low-power implementations. Taking the design space of an FIR filter as an example, the different steps of the design process are highlighted resulting in a low-power high-throughput filter implementation. It is part of an industrial read-write channel chip for hard disks with a worst case throughput of 1.6 GSamples/s at 23 mW in a 0.13-/spl mu/m CMOS technology. This filter requires less silicon area than other state-of-the-art filter implementations, and it disrupts the average trend of power dissipation by a factor of 6.