A Novel Decimal Logarithmic Converter Based on First-Order Polynomial Approximation
This paper presents a decimal logarithmic converter based on the decimal first-order polynomial (linear) approximation algorithm. The proposed approach is mainly based on a look-up table, followed a decimal linear approximation step. Compared with a binary-based decimal linear approximation algorith...
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| Published in | Circuits, systems, and signal processing Vol. 31; no. 3; pp. 1179 - 1190 |
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| Main Authors | , |
| Format | Journal Article |
| Language | English |
| Published |
Boston
SP Birkhäuser Verlag Boston
01.06.2012
Springer Nature B.V |
| Subjects | |
| Online Access | Get full text |
| ISSN | 0278-081X 1531-5878 |
| DOI | 10.1007/s00034-011-9365-y |
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| Summary: | This paper presents a decimal logarithmic converter based on the decimal first-order polynomial (linear) approximation algorithm. The proposed approach is mainly based on a look-up table, followed a decimal linear approximation step. Compared with a binary-based decimal linear approximation algorithm (Algorithm 1), the proposed algorithm (Algorithm 2) is error-free in the conversion between the decimal and the binary formats. The proposed architecture is implemented by the combinational logic in the binary coded decimal (BCD) encoding on Virtex5 XC5VLX110T FPGA. The results of the comparison show that the hardware performance of Algorithm 2 can run 2.15 times faster than Algorithm 1, with the expense of 1.14 times more area. |
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| Bibliography: | SourceType-Scholarly Journals-1 ObjectType-Feature-1 content type line 14 ObjectType-Article-2 content type line 23 |
| ISSN: | 0278-081X 1531-5878 |
| DOI: | 10.1007/s00034-011-9365-y |